idk, I'll start laying this out later

1 files changed, 737 insertions, 1 deletions

diff --git a/sc1224-scart.kicad_pcb b/sc1224-scart.kicad_pcb
index 2b8ba10..533d060 100644
--- a/sc1224-scart.kicad_pcb
+++ b/sc1224-scart.kicad_pcb
@@ -1,2 +1,738 @@
 (kicad_pcb (version 20221018) (generator pcbnew)
-)
\ No newline at end of file
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "A4")
+  (layers
+    (0 "F.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
+    (42 "Eco1.User" user "User.Eco1")
+    (43 "Eco2.User" user "User.Eco2")
+    (44 "Edge.Cuts" user)
+    (45 "Margin" user)
+    (46 "B.CrtYd" user "B.Courtyard")
+    (47 "F.CrtYd" user "F.Courtyard")
+    (48 "B.Fab" user)
+    (49 "F.Fab" user)
+    (50 "User.1" user)
+    (51 "User.2" user)
+    (52 "User.3" user)
+    (53 "User.4" user)
+    (54 "User.5" user)
+    (55 "User.6" user)
+    (56 "User.7" user)
+    (57 "User.8" user)
+    (58 "User.9" user)
+  )
+
+  (setup
+    (pad_to_mask_clearance 0)
+    (pcbplotparams
+      (layerselection 0x00010fc_ffffffff)
+      (plot_on_all_layers_selection 0x0000000_00000000)
+      (disableapertmacros false)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (dashed_line_dash_ratio 12.000000)
+      (dashed_line_gap_ratio 3.000000)
+      (svgprecision 4)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (dxfpolygonmode true)
+      (dxfimperialunits true)
+      (dxfusepcbnewfont true)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (sketchpadsonfab false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory "")
+    )
+  )
+
+  (net 0 "")
+  (net 1 "GND")
+  (net 2 "Net-(U2-INT)")
+  (net 3 "CVBS")
+  (net 4 "Net-(U2-VIDEO)")
+  (net 5 "unconnected-(J1-P1-Pad1)")
+  (net 6 "AUDIO_L")
+  (net 7 "unconnected-(J1-P3-Pad3)")
+  (net 8 "AUDIO_GND")
+  (net 9 "GND_B")
+  (net 10 "unconnected-(J1-P6-Pad6)")
+  (net 11 "VIDEO_B")
+  (net 12 "unconnected-(J1-P8-Pad8)")
+  (net 13 "GND_G")
+  (net 14 "unconnected-(J1-P10-Pad10)")
+  (net 15 "VIDEO_G")
+  (net 16 "unconnected-(J1-P12-Pad12)")
+  (net 17 "GND_R")
+  (net 18 "unconnected-(J1-P14-Pad14)")
+  (net 19 "VIDEO_R")
+  (net 20 "unconnected-(J1-P16-Pad16)")
+  (net 21 "CVBS_GND")
+  (net 22 "unconnected-(J1-P18-Pad18)")
+  (net 23 "unconnected-(J1-P19-Pad19)")
+  (net 24 "unconnected-(J1-P21-Pad21)")
+  (net 25 "+9V")
+  (net 26 "unconnected-(U1-Pad2)")
+  (net 27 "unconnected-(U1-Pad3)")
+  (net 28 "unconnected-(U1-Pad4)")
+  (net 29 "unconnected-(U1-Pad5)")
+  (net 30 "HSYNC")
+  (net 31 "unconnected-(U1-Pad11)")
+  (net 32 "VSYNC")
+  (net 33 "Net-(U2-CSYNC)")
+  (net 34 "unconnected-(U2-BURST-Pad5)")
+  (net 35 "+5V")
+  (net 36 "Net-(U3-Pad3)")
+  (net 37 "Net-(U3-Pad10)")
+  (net 38 "unconnected-(U2-O{slash}E-Pad7)")
+
+  (footprint "Package_SO:SO-8_5.3x6.2mm_P1.27mm" (layer "F.Cu")
+    (tstamp 1b24ea96-98ea-4b9a-a52c-1cebdfb1b84c)
+    (at 134.62 93.98 90)
+    (descr "SO, 8 Pin (https://www.ti.com/lit/ml/msop001a/msop001a.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
+    (tags "SO SO")
+    (property "Sheetfile" "sc1224-scart.kicad_sch")
+    (property "Sheetname" "")
+    (property "ki_description" "quad 2-input NAND gate")
+    (property "ki_keywords" "TTL nand 2-input")
+    (path "/56094d04-3fd2-40f8-b9c4-93205046d7d2")
+    (attr smd)
+    (fp_text reference "U3" (at 0 -4.05 90) (layer "F.SilkS")
+        (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 875a81b1-e1ec-438d-a25a-0c947eef39fc)
+    )
+    (fp_text value "74LS00" (at 0 4.05 90) (layer "F.Fab")
+        (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 08e450cc-1060-4f69-ba34-ddc39b2090b9)
+    )
+    (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab")
+        (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp b98089d9-6895-407c-9404-3703f2e7933b)
+    )
+    (fp_line (start -2.76 -3.21) (end -2.76 -2.465)
+      (stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 6410ee07-b7ee-43af-869f-e154d50392c7))
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+    (fp_line (start -4.7 -3.35) (end -4.7 3.35)
+      (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 304b49ef-e036-4448-b48c-0d4a85228163))
+    (fp_line (start -4.7 3.35) (end 4.7 3.35)
+      (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 666db083-354b-4137-b38b-d3fe3aca64ea))
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+    (fp_line (start -2.65 -2.1) (end -1.65 -3.1)
+      (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 4b197033-86e4-40e4-b89c-c1d3781f76de))
+    (fp_line (start -2.65 3.1) (end -2.65 -2.1)
+      (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp f4e6527a-7a36-47b9-a80a-bb41f62a2bdf))
+    (fp_line (start -1.65 -3.1) (end 2.65 -3.1)
+      (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp a883e36d-0579-44f0-b173-c99f04dbbbe5))
+    (fp_line (start 2.65 -3.1) (end 2.65 3.1)
+      (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 0c0f1b19-3b84-4cbf-986c-dba303476d38))
+    (fp_line (start 2.65 3.1) (end -2.65 3.1)
+      (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp e0e47079-361e-48ec-ad90-7ffd21565dcb))
+    (pad "1" smd roundrect (at -3.5 -1.905 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 33 "Net-(U2-CSYNC)") (pintype "input") (tstamp be9a299a-d17a-4755-a280-7f2b459afc7e))
+    (pad "2" smd roundrect (at -3.5 -0.635 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 32 "VSYNC") (pintype "input") (tstamp 0915e379-e239-4456-bc73-0207cb50573e))
+    (pad "3" smd roundrect (at -3.5 0.635 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 36 "Net-(U3-Pad3)") (pintype "output") (tstamp c6727adf-853b-49af-b1ac-f4967b005a4e))
+    (pad "4" smd roundrect (at -3.5 1.905 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 33 "Net-(U2-CSYNC)") (pintype "input") (tstamp a31285fa-512b-412e-8e0b-e0e081aaebf9))
+    (pad "5" smd roundrect (at 3.5 1.905 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 36 "Net-(U3-Pad3)") (pintype "input") (tstamp ef539e12-2947-41c7-a7df-3be81ddc9344))
+    (pad "6" smd roundrect (at 3.5 0.635 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 37 "Net-(U3-Pad10)") (pintype "output") (tstamp e7f6fbb7-2d37-4007-bab7-4d4be2c96310))
+    (pad "7" smd roundrect (at 3.5 -0.635 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 1 "GND") (pinfunction "GND") (pintype "power_in") (tstamp ef4a8148-febb-4e90-a65c-14d8bddbd5f2))
+    (pad "8" smd roundrect (at 3.5 -1.905 90) (size 1.9 0.6) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
+      (net 30 "HSYNC") (pintype "output") (tstamp f41b8b18-e2ca-41a8-a89a-da7d1f804988))
+    (model "${KICAD6_3DMODEL_DIR}/Package_SO.3dshapes/SO-8_5.3x6.2mm_P1.27mm.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "Capacitor_Tantalum_SMD:CP_EIA-2012-15_AVX-P_Pad1.30x1.05mm_HandSolder" (layer "F.Cu")
+    (tstamp 2a490610-6c30-47e1-aec1-62605eea6680)
+    (at 147.32 94.955 90)
+    (descr "Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator")
+    (tags "capacitor tantalum")
+    (property "Sheetfile" "sc1224-scart.kicad_sch")
+    (property "Sheetname" "")
+    (property "ki_description" "Unpolarized capacitor")
+    (property "ki_keywords" "cap capacitor")
+    (path "/0417ca6c-dce7-4153-a6eb-a80a49919e8b")
+    (attr smd)
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+        (effects (font (size 0.5 0.5) (thickness 0.08)))
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+    (pad "1" smd roundrect (at -0.975 0 90) (size 1.3 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
+      (net 3 "CVBS") (pintype "passive") (tstamp 4a2d9b5a-e8f5-4e9c-ada2-20ef30caa83b))
+    (pad "2" smd roundrect (at 0.975 0 90) (size 1.3 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
+      (net 4 "Net-(U2-VIDEO)") (pintype "passive") (tstamp a6267c54-134d-4cd9-ba06-c4537cafa0e5))
+    (model "${KICAD6_3DMODEL_DIR}/Capacitor_Tantalum_SMD.3dshapes/CP_EIA-2012-15_AVX-P.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "Connector_PinHeader_1.27mm:PinHeader_1x03_P1.27mm_Vertical" (layer "F.Cu")
+    (tstamp 6dd84a53-c9e8-4fc7-9a75-db3ac6c1f7d1)
+    (at 144.78 81.28 -90)
+    (descr "Through hole straight pin header, 1x03, 1.27mm pitch, single row")
+    (tags "Through hole pin header THT 1x03 1.27mm single row")
+    (property "Sheetfile" "sc1224-scart.kicad_sch")
+    (property "Sheetname" "")
+    (property "ki_description" "Positive 1.5A 35V Linear Regulator, Fixed Output 5V, TO-220/TO-263/TO-252")
+    (property "ki_keywords" "Voltage Regulator 1.5A Positive")
+    (path "/2d8e17f1-3040-43f7-b9d7-175113f5bb17")
+    (attr through_hole)
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+        (effects (font (size 1 1) (thickness 0.15)))
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+    (fp_text user "${REFERENCE}" (at 0 1.27) (layer "F.Fab")
+        (effects (font (size 1 1) (thickness 0.15)))
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+      (net 32 "VSYNC") (pinfunction "VSYNC") (pintype "input") (tstamp 2050e75d-f703-44fe-bb3b-46022268837d))
+    (pad "13" thru_hole circle (at 0.3 12.5) (size 1.4 1.4) (drill 0.9) (layers "*.Cu" "*.Mask")
+      (net 1 "GND") (pinfunction "GND_V") (pintype "power_in") (tstamp 4d93d0ab-5eae-4736-87c8-21627d1d5e9d))
+  )
+
+)