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| author | XANTRONIX Development | 2023-09-15 19:59:27 -0400 | 
|---|---|---|
| committer | XANTRONIX Development | 2023-09-15 19:59:27 -0400 | 
| commit | d1112192c097fd3ac4f098664a9dd9e505d5c6d4 (patch) | |
| tree | 86112eb0738278c2ff06925168c57374fa644ea2 /sc1224-scart.kicad_pro | |
| download | sc1224-scart-d1112192c097fd3ac4f098664a9dd9e505d5c6d4.tar.gz sc1224-scart-d1112192c097fd3ac4f098664a9dd9e505d5c6d4.tar.bz2 sc1224-scart-d1112192c097fd3ac4f098664a9dd9e505d5c6d4.zip | |
Initial commit
Diffstat (limited to 'sc1224-scart.kicad_pro')
| -rw-r--r-- | sc1224-scart.kicad_pro | 332 | 
1 files changed, 332 insertions, 0 deletions
| diff --git a/sc1224-scart.kicad_pro b/sc1224-scart.kicad_pro new file mode 100644 index 0000000..fa80c9d --- /dev/null +++ b/sc1224-scart.kicad_pro @@ -0,0 +1,332 @@ +{ +  "board": { +    "3dviewports": [], +    "design_settings": { +      "defaults": { +        "board_outline_line_width": 0.1, +        "copper_line_width": 0.2, +        "copper_text_size_h": 1.5, +        "copper_text_size_v": 1.5, +        "copper_text_thickness": 0.3, +        "other_line_width": 0.15, +        "silk_line_width": 0.15, +        "silk_text_size_h": 1.0, +        "silk_text_size_v": 1.0, +        "silk_text_thickness": 0.15 +      }, +      "diff_pair_dimensions": [], +      "drc_exclusions": [], +      "rules": { +        "min_copper_edge_clearance": 0.0, +        "solder_mask_clearance": 0.0, +        "solder_mask_min_width": 0.0 +      }, +      "track_widths": [], +      "via_dimensions": [] +    }, +    "layer_presets": [], +    "viewports": [] +  }, +  "boards": [], +  "cvpcb": { +    "equivalence_files": [] +  }, +  "erc": { +    "erc_exclusions": [], +    "meta": { +      "version": 0 +    }, +    "pin_map": [ +      [ +        0, +        0, +        0, +        0, +        0, +        0, +        1, +        0, +        0, +        0, +        0, +        2 +      ], +      [ +        0, +        2, +        0, +        1, +        0, +        0, +        1, +        0, +        2, +        2, +        2, +        2 +      ], +      [ +        0, +        0, +        0, +        0, +        0, +        0, +        1, +        0, +        1, +        0, +        1, +        2 +      ], +      [ +        0, +        1, +        0, +        0, +        0, +        0, +        1, +        1, +        2, +        1, +        1, +        2 +      ], +      [ +        0, +        0, +        0, +        0, +        0, +        0, +        1, +        0, +        0, +        0, +        0, +        2 +      ], +      [ +        0, +        0, +        0, +        0, +        0, +        0, +        0, +        0, +        0, +        0, +        0, +        2 +      ], +      [ +        1, +        1, +        1, +        1, +        1, +        0, +        1, +        1, +        1, +        1, +        1, +        2 +      ], +      [ +        0, +        0, +        0, +        1, +        0, +        0, +        1, +        0, +        0, +        0, +        0, +        2 +      ], +      [ +        0, +        2, +        1, +        2, +        0, +        0, +        1, +        0, +        2, +        2, +        2, +        2 +      ], +      [ +        0, +        2, +        0, +        1, +        0, +        0, +        1, +        0, +        2, +        0, +        0, +        2 +      ], +      [ +        0, +        2, +        1, +        1, +        0, +        0, +        1, +        0, +        2, +        0, +        0, +        2 +      ], +      [ +        2, +        2, +        2, +        2, +        2, +        2, +        2, +        2, +        2, +        2, +        2, +        2 +      ] +    ], +    "rule_severities": { +      "bus_definition_conflict": "error", +      "bus_entry_needed": "error", +      "bus_to_bus_conflict": "error", +      "bus_to_net_conflict": "error", +      "conflicting_netclasses": "error", +      "different_unit_footprint": "error", +      "different_unit_net": "error", +      "duplicate_reference": "error", +      "duplicate_sheet_names": "error", +      "endpoint_off_grid": "warning", +      "extra_units": "error", +      "global_label_dangling": "warning", +      "hier_label_mismatch": "error", +      "label_dangling": "error", +      "lib_symbol_issues": "warning", +      "missing_bidi_pin": "warning", +      "missing_input_pin": "warning", +      "missing_power_pin": "error", +      "missing_unit": "warning", +      "multiple_net_names": "warning", +      "net_not_bus_member": "warning", +      "no_connect_connected": "warning", +      "no_connect_dangling": "warning", +      "pin_not_connected": "error", +      "pin_not_driven": "error", +      "pin_to_pin": "warning", +      "power_pin_not_driven": "error", +      "similar_labels": "warning", +      "simulation_model_issue": "ignore", +      "unannotated": "error", +      "unit_value_mismatch": "error", +      "unresolved_variable": "error", +      "wire_dangling": "error" +    } +  }, +  "libraries": { +    "pinned_footprint_libs": [], +    "pinned_symbol_libs": [] +  }, +  "meta": { +    "filename": "sc1224-scart.kicad_pro", +    "version": 1 +  }, +  "net_settings": { +    "classes": [ +      { +        "bus_width": 12, +        "clearance": 0.2, +        "diff_pair_gap": 0.25, +        "diff_pair_via_gap": 0.25, +        "diff_pair_width": 0.2, +        "line_style": 0, +        "microvia_diameter": 0.3, +        "microvia_drill": 0.1, +        "name": "Default", +        "pcb_color": "rgba(0, 0, 0, 0.000)", +        "schematic_color": "rgba(0, 0, 0, 0.000)", +        "track_width": 0.25, +        "via_diameter": 0.8, +        "via_drill": 0.4, +        "wire_width": 6 +      } +    ], +    "meta": { +      "version": 3 +    }, +    "net_colors": null, +    "netclass_assignments": null, +    "netclass_patterns": [] +  }, +  "pcbnew": { +    "last_paths": { +      "gencad": "", +      "idf": "", +      "netlist": "", +      "specctra_dsn": "", +      "step": "", +      "vrml": "" +    }, +    "page_layout_descr_file": "" +  }, +  "schematic": { +    "annotate_start_num": 0, +    "drawing": { +      "dashed_lines_dash_length_ratio": 12.0, +      "dashed_lines_gap_length_ratio": 3.0, +      "default_line_thickness": 6.0, +      "default_text_size": 50.0, +      "field_names": [], +      "intersheets_ref_own_page": false, +      "intersheets_ref_prefix": "", +      "intersheets_ref_short": false, +      "intersheets_ref_show": false, +      "intersheets_ref_suffix": "", +      "junction_size_choice": 3, +      "label_size_ratio": 0.375, +      "pin_symbol_size": 25.0, +      "text_offset_ratio": 0.15 +    }, +    "legacy_lib_dir": "", +    "legacy_lib_list": [], +    "meta": { +      "version": 1 +    }, +    "net_format_name": "", +    "page_layout_descr_file": "", +    "plot_directory": "", +    "spice_current_sheet_as_root": false, +    "spice_external_command": "spice \"%I\"", +    "spice_model_current_sheet_as_root": true, +    "spice_save_all_currents": false, +    "spice_save_all_voltages": false, +    "subpart_first_id": 65, +    "subpart_id_separator": 0 +  }, +  "sheets": [ +    [ +      "4e904b58-d9f5-4508-9502-f47e6479e209", +      "" +    ] +  ], +  "text_variables": {} +} | 
 
    